An engineering team routed a 5 A power rail on a 10-mil trace across a 4-layer PCB. The board passed functional testing on the bench at room temperature. Six weeks after deployment in an industrial enclosure, field returns spiked — thermal imaging showed the trace running at 42°C above ambient, softening the solder mask and delaminating the copper from the substrate. The fix required a board respin, re-qualification, and three months of lost production.
The root cause was a trace width calculation error. The designer used a rule of thumb — “10 mils per amp” — without accounting for copper weight, ambient temperature, or whether the trace was on an internal or external layer. Proper trace width calculation is not optional — it is a fundamental reliability requirement that determines whether a PCB survives its intended service life.
This guide covers the physics, standards, and practical methods for calculating PCB trace width correctly — from the IPC-2221 equations to modern thermal simulation, with worked examples for common design scenarios.
Primary standard governing PCB trace width for current capacity
Common maximum allowable temperature rise above ambient
Standard copper weight (1.4 mil / 35 µm thickness)
Joule heating — the fundamental physics behind trace temperature rise
Why PCB Trace Width Matters
A PCB trace is a flat copper conductor etched onto a substrate. Its cross-sectional area — determined by width and copper thickness — governs how much current it can carry before excessive heating occurs. Unlike round wire, a trace dissipates heat primarily through the substrate and surrounding copper planes, making thermal management geometry-dependent.
An undersized trace causes three failure modes: resistive voltage drop that starves downstream components, I²R heating that degrades solder joints and insulation, and in extreme cases, copper fusing that creates an open circuit. An oversized trace wastes board real estate that could be used for routing, planes, or component placement.
Internal vs. external layers
External (outer) traces dissipate heat into the air and run cooler than internal traces of the same width. IPC-2221 provides separate equations for each case. An internal trace carrying the same current as an external trace must be approximately 2–3 times wider to achieve the same temperature rise — a difference many designers overlook.
The IPC-2221 Standard: How the Industry Calculates Trace Width
IPC-2221B (Generic Standard on Printed Board Design) provides empirical equations that relate current, temperature rise, copper thickness, and trace cross-sectional area. These equations are derived from curve-fitting experimental data originally published in MIL-STD-275 and refined over decades of industry use.
IPC-2221 Trace Width Calculation Steps
Step 1: Calculate the required cross-sectional area using: Area (mils²) = (I / (k × ΔT0.44))1/0.725, where I is current in amps, ΔT is allowable temperature rise in °C, and k is a constant (0.048 for external layers, 0.024 for internal layers).
Step 2: Convert cross-sectional area to trace width: Width (mils) = Area (mils²) / (Thickness (oz) × 1.378 mils/oz).
Step 3: Add manufacturing margin. Etching tolerance is typically ±1 mil for standard processes and ±0.5 mil for controlled-impedance boards. Add the worst-case tolerance to your calculated width.
These equations assume still air, no nearby heat sources, and uniform ambient temperature. In practice, forced-air cooling, thermal vias, and adjacent copper planes can improve heat dissipation significantly — but the IPC-2221 calculation provides a conservative baseline that ensures your trace will not fail under worst-case conditions.
"The ‘10 mils per amp’ rule is the most dangerous shortcut in PCB design. It happens to work for 1 oz copper on an external layer with a 10°C rise — but fails completely for internal layers, 0.5 oz copper, or tight thermal budgets. Always run the IPC-2221 calculation or use a validated calculator."
Hommer Zhao
Founder & Technical Expert, PCB Insider
Trace Width vs. Current Table (1 oz Copper, 10°C Rise)
The following table shows minimum trace widths for common current levels, calculated per IPC-2221 for 1 oz (35 µm) copper with a 10°C temperature rise above ambient. Internal-layer widths are wider because heat cannot escape directly to air.
| Current (A) | External Layer (mils) | Internal Layer (mils) | External Layer (mm) |
|---|---|---|---|
| 0.5 | 5 | 11 | 0.13 |
| 1.0 | 10 | 25 | 0.25 |
| 2.0 | 25 | 60 | 0.64 |
| 3.0 | 42 | 100 | 1.07 |
| 5.0 | 90 | 210 | 2.29 |
| 7.0 | 150 | 360 | 3.81 |
| 10.0 | 270 | 640 | 6.86 |
| 15.0 | 520 | 1250 | 13.2 |
| 20.0 | 850 | 2050 | 21.6 |
These values assume 1 oz copper and 10°C rise
For 2 oz copper, divide the width by approximately 2. For a tighter thermal budget (5°C rise), increase the width by roughly 50%. For higher ambient temperatures, reduce the allowable ΔT accordingly. Always verify critical traces with the full IPC-2221 formula or a thermal simulation tool.
Copper Weight and Its Impact on Trace Width
Copper weight (measured in oz/ft²) directly determines the trace thickness and therefore its cross-sectional area. Heavier copper allows narrower traces for the same current capacity — but increases PCB cost, complicates fine-pitch routing, and requires wider spacing for reliable etching.
0.5 oz Copper
17.5 µm (0.7 mil) thick. Used for fine-pitch HDI and impedance-controlled signal layers. Not recommended for power traces above 1 A.
1 oz Copper
35 µm (1.4 mil) thick. The industry standard for most applications. Good balance of current capacity, etching resolution, and cost.
2 oz Copper
70 µm (2.8 mil) thick. Halves the required trace width for a given current. Minimum trace/space increases to 8/8 mil or wider.
For designs with both high-current power traces and fine-pitch signal routing, consider using different copper weights on different layers — for example, 2 oz on power layers and 0.5 oz on signal layers. This is a standard capability at most PCB fabrication shops but must be specified on the fabrication drawing.
"Doubling the copper weight does not double the current capacity — the relationship is nonlinear. Going from 1 oz to 2 oz typically increases current capacity by about 40% for the same trace width and temperature rise. The real benefit of heavier copper is narrower traces, which frees routing space on dense boards."
Hommer Zhao
Founder & Technical Expert, PCB Insider
Choosing the Right Temperature Rise
The allowable temperature rise (ΔT) is the most important parameter you choose — and the most commonly misunderstood. A lower ΔT means wider traces but cooler operation and longer component life. A higher ΔT saves board space but reduces reliability margins.
| Application | Recommended ΔT | Why |
|---|---|---|
| Consumer electronics | 10°C | Standard baseline. Balances trace width and thermal margin for most enclosed products. |
| Industrial / automotive | 10–20°C | Higher ambient temperatures reduce available thermal headroom. Use 10°C for Class 3. |
| Medical devices (Class III) | 5–10°C | Safety-critical. Conservative thermal design extends component life and reliability. |
| LED lighting / power supplies | 20–30°C | Compact enclosures with high ambient. Wider traces often impractical; use heavier copper instead. |
| Military / aerospace | 5°C | MIL-STD requirements. Extreme reliability margins with full derating. |
Voltage Drop: The Other Sizing Constraint
Temperature rise is not the only constraint. Long traces or traces carrying current to voltage-sensitive loads must also be sized for acceptable voltage drop. The resistance of a trace is: R = ρL / A, where ρ is the resistivity of copper (1.72 × 10-6 Ω·cm at 20°C), L is trace length, and A is cross-sectional area.
For a 3.3 V supply rail, even a 50 mV drop (1.5%) can push a microcontroller below its minimum operating voltage. For 12 V power distribution, 1% drop is a common design target. In both cases, the voltage-drop constraint may require a wider trace than the temperature-rise calculation alone.
Rule of thumb for voltage drop
For every inch of 1 oz, 10-mil-wide copper trace carrying 1 A, expect approximately 50 mV of drop at room temperature. This scales linearly with length and current, and inversely with trace width and copper weight. For critical power rails, always calculate both temperature rise and voltage drop, then use the wider result.
Six Common Trace Width Mistakes
What Goes Wrong
- Using “10 mils per amp” without checking copper weight or layer
- Sizing internal traces the same as external traces
- Ignoring voltage drop on long power distribution traces
- Forgetting to derate for high ambient temperatures
- Not adding etching tolerance margin to calculated width
- Routing power through vias without calculating via current capacity
How to Prevent It
- Always use the IPC-2221 formula or a validated trace width calculator
- Apply internal-layer derating (roughly 2–3× wider)
- Calculate voltage drop separately and use the wider result
- Reduce allowable ΔT when ambient exceeds 40°C
- Add ±1 mil manufacturing tolerance to minimum width
- Use multiple vias in parallel for power layer transitions
"I review dozens of PCB designs every month, and trace width errors are still the most common thermal issue I find. The irony is that the calculation takes 30 seconds with a free online tool. The respin costs $15,000 and six weeks. There is no engineering justification for skipping the calculation."
Hommer Zhao
Founder & Technical Expert, PCB Insider
Beyond IPC-2221: When to Use Thermal Simulation
The IPC-2221 equations assume isolated traces in still air. Real PCBs have copper planes, thermal vias, nearby components, and forced-air cooling that significantly affect heat dissipation. For high-current designs (>10 A), dense boards with multiple heat sources, or safety-critical applications, thermal simulation tools provide more accurate results.
ANSYS Icepak / SIwave
Full 3D thermal and electrical co-simulation. Industry standard for high-reliability designs. Handles multi-physics coupling between electrical losses and thermal response.
Altium PDN Analyzer
Power distribution network analysis integrated into Altium Designer. Visualizes current density and voltage drop across the entire PCB power delivery network.
Saturn PCB Toolkit
Free desktop calculator that implements IPC-2221 and adds via current capacity, differential pair impedance, and crosstalk estimation. A good starting point for most designs.
Worked Examples: Real-World Trace Width Calculations
Example 1: USB 2.0 Power Trace (500 mA, 1 oz external)
Current: 0.5 A. Copper: 1 oz. Layer: external. ΔT: 10°C.
IPC-2221 result: ~5 mils (0.13 mm). This is below the minimum etchable trace for most fab houses (4–5 mils), so the manufacturing minimum governs. Use 8–10 mils for margin.
Takeaway: Low-current traces are limited by manufacturing capability, not thermal capacity.
Example 2: Motor Driver Output (5 A, 1 oz internal)
Current: 5 A. Copper: 1 oz. Layer: internal. ΔT: 10°C.
IPC-2221 result: ~210 mils (5.3 mm). This is a wide trace that consumes significant routing area on an internal layer. Options: use 2 oz copper on the power layer (reduces to ~105 mils), or route on an external layer (~90 mils with 1 oz copper).
Takeaway: Internal power traces often drive the decision to use heavier copper or move power routing to external layers.
Example 3: Battery Charger Input (15 A, 2 oz external)
Current: 15 A. Copper: 2 oz. Layer: external. ΔT: 20°C.
IPC-2221 result: ~150 mils (3.8 mm). With 2 oz copper and a relaxed 20°C rise, the trace is manageable. Add thermal vias to a ground plane for additional heat spreading.
Takeaway: Combining heavier copper with a reasonable temperature rise keeps high-current traces practical.
References
- IPC-2221B — Generic Standard on Printed Board Design. IPC Standards
- Douglas Brooks, “PCB Currents: How They Flow, How They React” — Prentice Hall, 2013.
- Saturn PCB Design Toolkit — Free trace width and via current calculator. saturnpcb.com
- IPC-2152 — Standard for Determining Current-Carrying Capacity in Printed Board Design (updated thermal model).
Frequently Asked Questions
What is the standard trace width for 1 amp on a PCB?
For 1 oz copper on an external layer with a 10°C temperature rise, the IPC-2221 calculation gives approximately 10 mils (0.25 mm). On an internal layer, the same current requires about 25 mils (0.64 mm). These values change significantly with copper weight and allowable temperature rise.
Is the '10 mils per amp' rule of thumb accurate?
It is a rough approximation that happens to work for 1 oz copper on external layers with a 10°C rise. It fails for internal layers (need 2–3x wider), different copper weights, or different temperature budgets. Always use the IPC-2221 formula or a validated calculator for production designs.
How does copper weight affect trace width calculation?
Heavier copper increases the trace cross-sectional area for the same width, allowing more current. Doubling the copper weight (1 oz to 2 oz) roughly halves the required trace width. However, heavier copper increases PCB cost and limits minimum trace/space to wider geometries.
Should I use the same trace width on internal and external layers?
No. Internal traces must be significantly wider than external traces for the same current. External traces dissipate heat into the air; internal traces can only conduct heat laterally through the substrate. IPC-2221 provides separate constants for each case — internal traces typically need 2–3x the width of external traces.
What temperature rise should I design for?
10°C above ambient is the most common design target and a good default for consumer and industrial electronics. Medical and military applications often use 5°C for higher reliability. LED drivers and power supplies in compact enclosures may allow 20–30°C if components can tolerate the heat.
How do vias affect current-carrying capacity?
A standard 10-mil drill via can carry approximately 1–1.5 A. For higher currents, use multiple vias in parallel. A common rule is to place one via per amp of current when transitioning between layers on a power trace. Via current capacity increases with drill size and plating thickness.
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